Embedded flash memory IPs are offered in 0.25 §­, 0.18 §­ and in a wide variety of densities, arrays and I/Os. Excel can work with customers to customize its designs for specific applications and specifications. Please contact us for detailed information and data on customized IP services. Excel Semiconductor can provide its customers a wide range of IP design services from design-to-silicon needs.


1. Hold technical meeting to understand customer's need.
   
2. Check to determine if the customer'¡¡s need can be met by the existing IP library without revision.
   
3. Determine how to interface flash IP block with customer's logic
   
4. Provide customers with the following technical data and documents.
 
   
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Phantom Cell of Flash block IP
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Datasheet of flash block IP
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Guide lines for interface work
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Verilog Macro Model
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Test Guide lines
   
5. Do chip integration by placing customer's logic blocks and an embedded flash IP block and implementing routing. Provide customer with a Verilog Macro Model after implementing simulation. Do tape-out in GDS II format after checking DRC.
   
6. Send the Database to Wafer fabs.
   
7. Provide customer with test vectors and Sort and Test algorism.