| 1. |
Hold technical
meeting to understand customer's need. |
| |
|
| 2. |
Check to determine if the
customer'¡¡s need can be met by the existing
IP library without revision. |
| |
|
| 3. |
Determine how to interface
flash IP block with customer's logic |
| |
|
| 4. |
Provide customers with the
following technical data and documents. |
| |
| |
|
* |
Phantom Cell of Flash
block IP |
* |
Datasheet of flash
block IP |
* |
Guide lines for interface
work |
* |
Verilog Macro Model |
* |
Test Guide lines |
|
| |
|
| 5. |
Do chip integration by placing
customer's logic blocks and an embedded flash
IP block and implementing routing. Provide
customer with a Verilog Macro Model after
implementing simulation. Do tape-out in GDS
II format after checking DRC. |
| |
|
| 6. |
Send the Database to Wafer
fabs. |
| |
|
| 7. |
Provide customer with test
vectors and Sort and Test algorism. |
| |
|