Architecture
* Single power supply operation ;2.7 to 3.6 volt read
and write operations
* Flexible sector architecture
- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen
64 Kbyte sectors (byte mode)
- One 8 Kword, two 4 Kword, one 16 Kword, and fifteen
32 Kword sectors (word mode)
* Supports full chip erase
* Sector Protection features:
* Top or bottom boot block configurations
* Compatibility with JEDEC standards
- Pinout and software compatible with single-power
supply Flash
High performance
* Access times as fast as 70 ns
* Low power consumption (typical values at 5MHz)
- 200 nA Automatic Sleep mode & standby mode current
- 7 mA read current
- 15 mA program/erase current
* Minimum 100,000 write cycle guarantee per sector
* 20-year data retention at 125¡ÆC
Packages
- 48-ball FBGA
- 48-pin TSOP
Features
* Unlock Bypass Program Command
* Data# Polling and toggle bits
* Ready/Busy# pin (RY/BY#)
* Erase Suspend/Erase Resume
* Hardware reset pin (RESET#)